This document describes Value RAM's 512M x 64-bit (4GB) DDR3-1333 CL9 SDRAM (Synchronous DRAM) 1 Rx 8 memory module based on eight 512M x 8-bit DDR3-1333 FBGA compo- nents The SPD is programmed to JEDEC standard latency DDR3-1333 timing of 9-9-9 at 15V This 240-pin DIMM uses gold contact fingers The electrical & mechanical specifica- tions are as follows- JEDEC standard 15V (1425V 1575V) Power Supply- VDDQ 15V (1425V 1575V)- 667 M Hz f CK for 1333 Mbsecpin- 8 independent internal bank- Programmable CAS Latency 9 8 7 6- Programmable Additive Latency 0 CL
- 2 or CL
- 1 clock- Programmable CAS Write Latency (CWL) 7 (DDR3-1333)- 8-bit pre-fetch- Burst Length 8 (Interleave without any limit sequential with starting address &8220;000” only) 4 with t CCD 4 which does not allow seamless read or write either on the fly using A12 or MRS- Bi-directional Differential Data Strobe- Internal (self) calibration Internal self calibration through ZQ pin (RZQ 240 ohm &177; 1)- On Die Termination using ODT pin- Average Refresh Period 78us at lower than TCASE 85&176;C 39us at 85&176;C &60; TCASE &60; 95&176;C- Asynchronous Reset- PCB Height 0740” (1875mm) or 1180” (3000mm) Memory Buffered memory type Unregistered (unbuffered) Memory layout (modules x size)1 x 4 GBInternal memory 4 GBComponent for P Cserver Memory form factor 240-pin DIMMCAS latency 9 Memory voltage 15 VMemory bus 64 bit Lead plating Gold Module configuration 512M x 64 Row cycle time 49125 ns Refresh row cycle time 260 ns Row active time 36 ns SPD profile Yes Memory ranking 1ECCNo Memory clock speed 1333 MHz Internal memory type DDR3