NXP 8-Bit CMOS Microcontrollers
- NXP P80C552EBA/08, 512, The 80C552 single-chip 8-Bit microcontroller is manufactured in an advanced CMOS process & is a derivative of the 80C51 microcontroller family. The 80C552 has the same instruction set as the 80C51. The 80C552 contains a volatile 256 x 8 read/write data memory, five 8-bit I/O ports, one 8-bit input port, two 16-bit timer/event counters (identical to the timers of the 80C51), an additional 16-bit timer coupled to capture & compare latches, a 15-source, two-priority-level, nested interrupt structure, an 8-input ADC, a dual DAC pulse width modulated interface, two serial interfaces (UART & I&sup 2;C-bus), a "watchdog" timer & on-chip oscillator & timing circuits. For systems that require extra capability, the 80C552 can be expanded using standard TTL compatible memories & logic. In addition, the 80C552 has two software selectable modes of power reduction
- idle mode & power-down mode. The idle mode freezes the CPU while allowing the RAM, timers, serial ports, & interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. The device also functions as an arithmetic processor having facilities for both binary & BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 45 two-byte, & 17 three-byte. With a 16 MHz (24 MHz) crystal, 58 pct of the instructions are executed in 0.75 us (0.5 us) & 40 pct in 1.5 us (1 us). Multiply & divide instructions require 3 us (2 us). NXP P80C552EBA/08, 512 Single-Chip 8-Bit Microcontroller PLCC 68