
Modified Harvard architecture C compiler optimized instruction set 84 base instructions with flexible addressing modes 24-bit wide instructions 16-bit wide data path Linear program memory addressing up to 4M instruction words Linear data memory addressing up to 64kbytes Up to 144kbytes on-chip FLASH program space Up to 48k instruction words Up to 8kbytes on-chip data RAMUp to 4kbytes non-volatile data EEPROM16 x 16-bit working register array Up to 30 MIPs operation Up to 41 interrupt sources Vector table with up to 62 vectors