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HyperX FURY Low Voltage 8GB Kit DDR3L 1600MHz Memory (2x4GB)
HyperX FURY Low Voltage 8GB Kit DDR3L 1600MHz Memory (2x4GB) HyperX HX316LC10FB/4 is a 512M x 64-bit (4GB) DDR3L-1600 CL10 SDRAM (Synchronous DRAM) 1Rx8, low voltage, memory module, based on eight 512M x 8-bit DDR3 FBGA components. Each module kit supports Intel Extreme Memory Profiles (Intel XMP) 2.0. This module has been tested to run at DDR3L-1600 at a low latency timing of 10-10-10 at 1.35V. Additional timing parameters are shown in the PnP Timing Parameters section below. The JEDEC standard electrical and mechanical specifications areas follows: PnP JEDEC TIMING PARAMETERS: JEDEC/PnP: DDR3L-1600 CL10-10-10 @1.35V/1.5V DDR3L-1333 CL9-9-9 @1.35V/1.5V DDR3L-1066 CL7-7-7 @1.35V/1.5V XMP Profile 1: DDR3L-1600 CL10-10-10 @1.35V FEATURES JEDEC standard 1.35V and 1.5V Power Supply VDDQ =
1.35V and 1.5V 800MHz fCK for 1600Mb/sec/pin independent internal bank Programmable CAS Latency: 11, 10, 9, 8, 7, 6 Programmable Additive Latency: 0, CL - 2, or CL - 1 clock 8-bit pre-fetch Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS] Bi-directional Differential Data Strobe Internal(self) calibration: Internal self calibration through ZQ pin (RZQ: 240 ohm ± 1%) On Die Termination using ODT pin Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE ≤ 95°C Asynchronous Reset Height 1.291” (32.80mm) w/heatsink, single sided component SPECIFICATIONS CL(IDD) 10 cycles Row Cycle
Time (tRCmin) 48.125ns (min.) Refresh to Active/Refresh Command Time (tRFCmin) 260ns (min.) Row Active Time (tRASmin) 37.5ns (min.) Maximum Operating Power TBD W* UL Rating 94 V - 0 Operating Temperature 0oC to +85oC Storage Temperature -55oC to +100oC *Power will vary depending on the SDRAM used.
1.35V and 1.5V 800MHz fCK for 1600Mb/sec/pin independent internal bank Programmable CAS Latency: 11, 10, 9, 8, 7, 6 Programmable Additive Latency: 0, CL - 2, or CL - 1 clock 8-bit pre-fetch Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS] Bi-directional Differential Data Strobe Internal(self) calibration: Internal self calibration through ZQ pin (RZQ: 240 ohm ± 1%) On Die Termination using ODT pin Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE ≤ 95°C Asynchronous Reset Height 1.291” (32.80mm) w/heatsink, single sided component SPECIFICATIONS CL(IDD) 10 cycles Row Cycle
Time (tRCmin) 48.125ns (min.) Refresh to Active/Refresh Command Time (tRFCmin) 260ns (min.) Row Active Time (tRASmin) 37.5ns (min.) Maximum Operating Power TBD W* UL Rating 94 V - 0 Operating Temperature 0oC to +85oC Storage Temperature -55oC to +100oC *Power will vary depending on the SDRAM used.
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